1/10 february 2002 . std35nf3ll std35nf3ll-1 n-channel 30v - 0.014 w - 35a ipak/dpak stripfet ? ii power mosfet n typical r ds (on) = 0.016 w @ 4.5v n optimal r ds (on) x qg trade-off @ 4.5v n conduction losses reduced n switching losses reduced n low threshold drive n through-hole ipak (to-251) power package in tube (suffix a-1o) n surface-mounting dpak (to-252) power package in tape & reel (suffix at4o) description this application specific power mosfet is the third genaration of stmicroelectronis unique osingle feature size ? o strip-based process. the resulting transistor shows the best trade-off between on-resistance and gate charge. when used as high and low side in buck regulators, it gives the best performance in terms of both conduction and switching losses. this is extremely important for motherboards where fast switching and high efficiency are of paramount importance. applications n specifically designed and optimised for high efficiency dc/dc converters type v dss r ds(on) i d std35nf3ll std35nf3ll-1 30 v 30 v < 0.0195 w < 0.0195 w 35 a 35 a 3 2 1 1 3 ipak to-251 (suffix a-1o) dpak to-252 (suffix at4o) absolute maximum ratings ( ? ) pulse width limit ed by safe operating area. (1) starting t j =25 o c, i d = 17.5 a, v dd =24v symbol parameter value unit v ds drain-source voltage (v gs =0) 30 v v dgr drain-gate voltage (r gs =20k w ) 30 v v gs gate- source voltage 16 v i d drain current (continuos) at t c =25 c 35 a i d drain current (continuos) at t c = 100 c25 a i dm ( ? ) drain current (pulsed) 140 a p tot total dissipation at t c =25 c 50 w derating factor 0.33 w/ c e as (1) single pulse avalanche energy 300 mj t stg storage temperature -55 to 175 c t j max. operating junction temperature internal schematic diagram
std35nf3ll/std35nf3ll-1 2/10 thermal data electrical characteristics (t case =25 c unless otherwise specified) off on (* ) dynamic rthj-case rthj-amb t l thermal resistance junction-case thermal resistance junction-ambient maximum lead temperature for soldering purpose max max typ 3 100 300 c/w c/w c symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage i d = 250 m a, v gs =0 30 v i dss zero gate voltage drain current (v gs =0) v ds = max rating v ds = max rating t c = 100 c 1 10 m a m a i gss gate-body leakage current (v ds =0) v gs = 16 v 100 na symbol parameter test conditions min. typ. max. unit v gs(th) gate threshold voltage v ds =v gs i d = 250 m a 1v r ds(on) static drain-source on resistance v gs =10v i d = 17.5 a v gs = 4.5 v i d = 17.5 a 0.014 0.016 0.0195 0.0215 w w symbol parameter test conditions min. typ. max. unit g fs (*) forward transconductance v ds =15 v i d = 17.5 a 19 s c iss c oss c rss input capacitance output capacitance reverse transfer capacitance v ds = 25v, f = 1 mhz, v gs = 0 800 250 60 pf pf pf
3/10 std35nf3ll/std35nf3ll-1 switching on switching off source drain diode (*) pulsed: pulse duration = 300 m s, duty cycle 1.5 %. ( ? ) pulse width limited by safe operating area. symbol parameter test conditions min. typ. max. unit t d(on) t r turn-on delay time rise time v dd =15v i d = 17.5 a r g = 4.7 w v gs = 4.5 v (resistive load, figure 3) 17 100 ns ns q g q gs q gd total gate charge gate-source charge gate-drain charge v dd =24vi d =35av gs =5v 12.5 4.2 5.2 17 nc nc nc symbol parameter test conditions min. typ. max. unit t d(off) t f turn-off delay time fall time v dd =15v i d = 17.5 a r g = 4.7 w v gs = 4.5 v (resistive load, figure 3) 20 21 ns ns symbol parameter test conditions min. typ. max. unit i sd i sdm ( ? ) source-drain current source-drain current (pulsed) 35 140 a a v sd (*) forward on voltage i sd =35a v gs =0 1.3 v t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd = 35 a di/dt = 100a/ m s v dd =15v t j = 150 c (see test circuit, figure 5) 35 44 2.5 ns nc a electrical characteristics (continued) safe operating area thermal impedance
std35nf3ll/std35nf3ll-1 4/10 output characteristics transfer characteristics transconductance static drain-source on resistance gate charge vs gate-source voltage capacitance variations
5/10 std35nf3ll/std35nf3ll-1 .. normalized gate threshold voltage vs temperature normalized on resistance vs temperature source-drain diode forward characteristics normalized breakdown voltage vs temperature. ..
std35nf3ll/std35nf3ll-1 6/10 fig. 1: unclamped inductive load test circuit fig. 1: unclamped inductive load test circuit fig. 2: unclamped inductive waveform fig. 3: switching times test circuits for resistive load fig. 4: gate charge test circuit fig. 5: test circuit for inductive load switching and diode recovery times
7/10 std35nf3ll/std35nf3ll-1 dim. mm inch min. typ. max. min. typ. max. a 2.2 2.4 0.086 0.094 a1 0.9 1.1 0.035 0.043 a3 0.7 1.3 0.027 0.051 b 0.64 0.9 0.025 0.031 b2 5.2 5.4 0.204 0.212 b3 0.85 0.033 b5 0.3 0.012 b6 0.95 0.037 c 0.45 0.6 0.017 0.023 c2 0.48 0.6 0.019 0.023 d 6 6.2 0.236 0.244 e 6.4 6.6 0.252 0.260 g 4.4 4.6 0.173 0.181 h 15.9 16.3 0.626 0.641 l 9 9.4 0.354 0.370 l1 0.8 1.2 0.031 0.047 l2 0.8 1 0.031 0.039 a c2 c a3 h a1 d l l2 l1 13 == b3 b b6 b2 e g == == b5 2 to-251 (ipak) mechanical data 0068771-e
std35nf3ll/std35nf3ll-1 8/10 dim. mm inch min. typ. max. min. typ. max. a 2.2 2.4 0.086 0.094 a1 0.9 1.1 0.035 0.043 a2 0.03 0.23 0.001 0.009 b 0.64 0.9 0.025 0.035 b2 5.2 5.4 0.204 0.212 c 0.45 0.6 0.017 0.023 c2 0.48 0.6 0.019 0.023 d 6 6.2 0.236 0.244 e 6.4 6.6 0.252 0.260 g 4.4 4.6 0.173 0.181 h 9.35 10.1 0.368 0.397 l2 0.8 0.031 l4 0.6 1 0.023 0.039 == d l2 l4 13 == b e == b2 g 2 a c2 c h a1 detail oao a2 detail oao to-252 (dpak) mechanical data 0068772-b
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